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|Home||» Products||» Diagnostic Tools||» Jtag Master Boundary Scan Tester|
The JTAGMaster Tester and Programmer is a fully integrated solution for the configuration and diagnosis of Programmable Logic Devices (PLDs).
This unit includes :
The JTAGMaster is also capable of programming EEPROM devices using external adapters. Standard brinary files are supported and can also be modified in the device buffer window. A wide range of EEPROM devices are present in the library which can be easily modified by users. The following protocols are supported by the JTAGMaster :
As a product, the JTAGMaster In-System and Standalone Programmer is also available.
The JTAGMaster Tester and Programmer is designed to work with ABI’s bespoke software – a multiple purpose platform which enables users to freely configure test procedures and instruments. Integrated functions are also available to the user to automatically learn the device status, provide pin-to-pin comparison and information as well as use some reporting facilities. The internal library can be updated through BSDL files available from manufacturers’ websites.
With its ability to both test and program PLDs, this new ABI product allows users to verify the functionality of a device, download a bespoke program to a device or even re-test the device after it has been programmed !